Quad: an Array Section Descriptor for Parallel Computing

N. Yonezawa and K. Wada (Japan)


parallel programming, array section descriptor, distributed shared memory, communication code generation


In this paper, we propose a new array section descriptor, called quad, which can efficiently represent access patterns typically observed in parallel programs. The quad consists of a set of four parameters. We defined an intersection operation between two quads, which can be used to examine data dependency between two corresponding code segments in which the array sections are accessed. For evaluation, simulation has been done for the execution of several shared memory programs on distributed memory environment. In this experiment, we represented read/written array sections by quads and used intersection operations between the quads in order to identify data to be transferred via a network. From the results, we found that the quad is efficient in representing various access patterns and the quad can mitigate the network load compared to conventional descriptor drastically.

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