Phase-difference Interpolating SHPD-PLL Frequency Synthesizer with Optimized Loop Gain Control

M. Nanbu, T. Oie, T. Iritani (Japan)

Keywords

Frequency Synthesizer, SHPD-PLL, Rapid Convergence, Fractional-N Synthesizer, Optimized Loop Gain Control

Abstract

Sampler-and-holder type phase detector (SHPD)-PLL frequency synthesizer is able to rapidly acquire the target frequency, because it has no low-pass-filter (LPF) in its loop. Additionally its convergence speed is proportion to the reference frequency. So it becomes faster using the high-rate reference frequency. But this synthesizer has the constraint that its output frequency spacing is equal to its reference frequency. Therefore, we have proposed new synthesizer, which is based fractional divider SHPD-PLL frequency synthesizer that interpolates the target phase difference corresponding to target frequency with adjacent recent two phase-differences, without using the averaged value of phase-differences. In the case of usual fractional N synthesizer, the target phase-difference is obtained by averaging of phase-differences using LPF, and its conver gence time become longer than the inverse number of min imum output frequency spacing. But, proposed synthe sizer is able to realize the high-speed convergence using the high-rate reference frequency, while the small output frequency spacing is kept, because it has no low-pass-filter (LPF) in its loop. In this paper, we propose new scheme to converge output frequency still faster with optimized loop gain control based on VCO input-output characteristic cor rection from comparison of predictable phase-difference in next time to actual one.

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