The Utilization od Distributed Processing on Signaling Calls in High Speed ATM Network: Architecture, Modeling, Simulation & Perfomance Analysis

R. Citro and S. Ghosh (USA)


Call Processor, ATM networks, modeling, and distributed simulation


This paper presents an efficient distributed call processing architecture to accelerate the call setup process in ATM net works. Although distributed call processing had been pre viously employed in classical telephony, the study reported here is unique in that, in ATM networks, call processing is driven by user call requests and Quality of Service (QoS) metrics. The architecture is designed to address a highly stressed network, just short of driving it into "instability". Two representative networks a 15-node and a 50-node ATM network spanning the continental US, are modeled in an asynchronous distributed simulator and executed on an asynchronous distributed testbed of 45+ linux worksta tions. The underlying distributed hardware architectures for the ATM nodes are modeled utilizing realistic values for the logic and timing parameters. Extensive simulation ex periments are designed and executed to yield insights into network performance behavior, encapsulated through key metrics including call success rate, call setup time, and link bandwidth utilization, as a function of the important param eters of the distributed call processing architecture includ ing the number of call processors at a node, the degree of contention for the shared memory, and shared memory ac cess speed.

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