A Fully Programmable Rake-Receiver Architecture for Multi-Standard Baseband Processors

A. Nilsson, E. Tell, and D. Liu (Sweden)




Programmability will be increasingly important in future multi-standard radio systems. We are presenting a fully programmable and flexible DSP platform capable of effi ciently performing channel estimation and Maximum Ra tio Combining (MRC) based channel equalization for a large number of wireless transmission systems in soft ware. Our processor is based on a programmable DSP processor with SIMD-computing clusters. We also map Rake receiver kernel functions supporting a large number of common Wireless LAN and 3G standards to this micro architecture. The use of the inherit flexibility for future standards is also discussed. Benchmarking show that with the proposed instruction set architecture, our architecture can support channel estimation, equalization and decod ing of: WCDMA (FDD/TDD-modes), TD-SCDMA and the higher data rates of IEEE 802.11b (CCK) at clock fre quency not exceeding 76 MHz.

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