FPGA Implementation of a Sub-Pixel Images Matching Algorithm

A.M. Devjatajkin, K.F. Lysakov, and M.J. Shadrin (Russia)


FPGA, high-performance processing, hardware,automation, algorithm, implementation


This work presents implementation of the sub-pixel matching algorithm commonly used in searching small size objects on images of terrestrial surface. This algorithm has been implemented on the basis of Field Programmable Gate Arrays (FPGA). This allows us to achieve significant increase of performance due to pipelined and parallel calculations.

Important Links:

Go Back