Design of Up-Conversion Stages in Software Radio Transmitters: FPGA vs. ASSP

C. Benavente, F.J. Ortega, and J.M. Pardo (Spain)


Digital up-converter, interpolation, modelling, FPGA, CIC


The evolution and growth of telecommunications systems and services run in parallel to IC design techniques evolution. New fabrication processes allow new functionalities and higher performance. This paper describes the constraints in the design of the transmission side of a digital communications modem based on the use of specialized digital up converters (DUC) where based band processing is performed by a high performance DSP and the up-conversion to FI is performed by a digital chip versus an FPGA based design. The paper highlights the issues found in the design phase related to up-conversion, the required interpolation stage and the digital-to-analog conversion. The use of FPGA devices for DUC can simplify the design and allows the introduction of new functionalities in order to improve the transmitter performance. This kind of design is compared in their features with that using application-specific-standard-part (ASSP) for this task

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