FPGA-Targeted Neural Architecture for Embedded Alertness Detection

B. Girau (France) and K.B. Khalifa (Tunisia)


alertness, neural networks, FPGA, FPNA, low-power


Several recent works have used neural networks to discrim inate vigilance states in humans from electroencephalo graphic (EEG) signals. Our study aims at being more ex haustive. It takes into account various connectionist mod els, and it precisely studies their features and their perfor mances. Physicians have been associated to the project, especially when tuning our models. Above all, our work has been oriented in such a way to get a light, low-power, easy to wear system. First implementation works have fo cused on the use of a Self-Organizing Map architecture, since the most efficient neural model of our study, a multi layer perceptron (MLP), was too huge for a straightforward FPGA implementation. In this paper, we describe how the theory of FPNA (Field Programmable Neural Arrays) has been applied to this model, so as to simplify the topology of the MLP of our application. Thanks to this simplifica tion, a fully parallel FPGA implementation has been made possible and efficient, without any significant performance loss.

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