Scaleable ATM Switch Architecture for CATV Networks and Dimensioning of its Buffers

H. Kariniemi and J. Nurmi (Finland)


ATM, dimensioning of buffers, CATV, crossbar switch,Geo/D/1/K, scalability


This paper studies scalability of an ATM switch which has been designed for multiplexing and switching Digital Video Broadcasting (DVB) services over 2.488 Gbits/s Asynchronous Transfer Mode (ATM) Cable TV (CATV) backbone network. The switch core, which is an internally buffered crossbar switch, has been implemented on a Field Programmable Gate Array (FPGA) circuit, which allows the system to be modified. The aim of the modifications this paper proposes is to improve the scalability of the architecture for higher number of ports and channels, and more optimal consumption of the FPGA’s resources. The switch core can also be modified for higher transmission rates. This paper also presents a routing table implemented with three SRAM memories which is a quite unique solution that provides higher operation rate than Contents Addressable Memories (CAM). The throughput of the switch is analyzed using a simplified service model that allows the overflow probabilities of the cross-point buffers to be examined independently using a Geo/D/1/K queueing model. It can be shown that the simplified service model produces over estimated values of the overflow probabilities. However, this model can be used for showing that by speeding up the emptying of the cross-point buffers the overall memory space consumption of the switch can be considerably reduced. The buffers can also be dimensioned more optimally applying this same model.

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