Energy Saving Compiler Framework on Embedded Systems

C. Tianzhou, L. Xiao, H. Jiangwei, and H. Yu (PRC)


framework, DVS, region


Dynamic voltage and frequency scaling of the CPU has been identified as one of the most effective ways to reduce energy consumption of a program. In this paper we present a compiler framework to reduce the energy consumption on embedded systems. The DVS technology was applied in the compiler. Simulation results show that CPU energy can save to 13%-15% for the Intel Xscale PXA250 benchmark with a time performance penalty of at most 5%.

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