A High Performance Architecture for Real Time Power System Simulators based on FPGA Hardware Acceleration

J.C.G. Pimentel (Canada)


Power System Simulation; Real-Time Simulator; Hardware Emulation; Reconfigurable Computing


Previous generation of FPGA devices were neither big enough nor fast enough to allow them to compete with specialized microprocessors. This situation changed in the last five years with FPGA vendors offering devices with more than 5 million gates and running at clock frequencies higher than 400 MHz. These high density FPGAs can now be used to implement custom digital systems (System-On-Chip – SoC), including systems with single and multiple processors (Multiprocessor-Systems On-Chip - MpSoC) or a combination of both. Taking advantage of the fast development of FPGA devices, academic researchers and industrial R&D groups started using them as a mean to speed up real time simulation of power systems. Here we present a digital real time power system simulator (“DRTPSS”) which is solely based on FPGA devices. Though the methodology was initially developed for power system simulation, it has broader application as we demonstrated in [7].

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