Design of Universal Overcurrent Relay using FPGA

Y.-Y. Hong and P.-C. Chang-Chian (Taiwan)


Artificial Neural Network, Silicon Intellectual Property, FPGA, Overcurrent Protective Relay


This paper applied the artificial neural network (ANN) technique for designing a universal over-current (OC) characteristic chip. The inverse-time characteristics for OC relays comply with the IEC 255-3 Standard. The proposed design was realized by Field Programmable Gate Array (FPGA) and developed from the concept of digital silicon intellectual property (SIP). The proposed design not only reduces the complicated arithmetic operations for digital integrated circuit design, but also reduces the areas of chip memories required. This paper utilized the concept of system-on-chip (SOC) that can be applied to all overcurrent conditions. Therefore, the proposed SIP-based design can achieve the universal overcurrent protection purpose. Finally, the precision of the designed chip was verified by simulations related to a distribution system and an asynchronous motor protective system.

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