Hardware Simulation of an Adaptive Control Algorithm

S. He and X. Xu (USA)


Hardware simulation, ADALINE, control algorithms


This paper describes the parallel hardware simulation of an adaptive control algorithm. Currently, many modern control systems are designed based on mathematical models. The developed algorithms normally work well in software simulation. However, when implemented into a real-world system, some algorithms appear vulnerable to external disturbance and model imperfection. In this pa per, we introduce a hardware-in-the-loop simulation. The simulation test bed, consisting of a Spartan II FPGA board and a PIC 18F452 microcontroller, is co implemented using both hardware and software and run in a real-time environment. Simulation result demonstrates the effectiveness of the real-time test bed to evaluate an ADALINE based adaptive control algorithm. Further, it can show some problems in physical implementation of the algorithm.

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