Scalable Integer based Frequency Error Estimation Technique for Clock Recovery in Packet Switched Networks

M. Mathur and K. Saha (India)

Keywords

Digital Video Broadcast (DVB), IP based networks, clock recovery, packet switch network, jitter, digital video communication

Abstract

In Digital Video Broadcasting (DVB) there is large jitter due to delayed arrival of PCR packets. The expected jitter in the transmission channel can vary from less than 1/10th of a msec (terrestrial transmission) upto a maximum of few hundred msec (IP transmission). The classical clock recovery algorithms correct the clock with the arrival of each new PCR packet, require a very narrow bandwidth filter to pass out high frequency jitter noise and are based on floating point arithmetic. The system stability and the response time becomes an issue as the jitter in the system increases. In this paper we present a new integer based approach to measuring the frequency error and present a low complexity algorithm based on Normalized Least Mean Square Algorithm for estimating the frequency error in the presence of large jitter in the transmission channel. The algorithm is scalable and has been shown to scale to both low jitter (terrestrial) and high jitter (IP based networks) transmission channels by simply changing the learning time of the system.

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