Integrated Modeling Methodology for Nanoscale Electronic Devices

A. Lombo-Carrasquilla and G.E. Becerra-Forigua (Columbia)


Modeling, nanodevices, molecular transistor, VHDL AMS, simulation.


An integrated modeling methodology for nano-scale electronic devices is presented. The proposed methodology is based on the use of functional architectures, which are comprised of IEEE VHDL-AMS entities representing nano-devices in an object-oriented fashion. The VHDL-AMS entities can be included in more complex designs in order to validate device behavior. The designs can be shared with current and future nanotechnology modeling resources, which are available worldwide. The methodology facilitates, under restricted conditions, the insertion of quantum corrections to nano-scale device models, during simulation. This methodology includes domain-oriented approximations from ab-initio modeling and the selection of quantum mechanical compact models that can be integrated with basic electronic circuit or non-electronic lumped-element models. Certain practical modeling and simulation experiences related to a molecular transistor were used for validation of the methodology.

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