A Low-Power 13-Bit Analog Front End for Mobile Battery Monitoring Applications

K. Jang, Seungyun Lee, Sangheon Lee, J. Lim, S. Cha, H. Yang, and J. Choi (Korea)


Battery Monitoring Analog Front End, Algorithmic ADC.


A low-power AFE (analog front end) chip is designed and fabricated with a 13-bit resolution performance for mobile battery monitoring applications. The AFE mainly consists of the PGA (programmable gain amplifier) and ADC (analog-to-digital converter). Other functional blocks are also included such as protection flag sensors and self oscillator. The PGA provides wide-range gain values of 40dB in order to process voltage, current, and temperature of the battery. A modified ratio-independent MDAC (multiplying digital-to-analog converter) scheme is proposed in the algorithmic ADC. The chip is implemented in a 0.5-μm 2-poly 3-metal CMOS technology. Total power dissipation of the entire chip including all functional blocks is 1mW for a single supply voltage higher than 4V.

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