A Cache Miss Analysis for Multithreaded Architectures

J.L. Hamkalo, A.J. Vega, and B. Cernuschi-Frías (Argentina)


Cache, multithreading, miss, classification


A new model for cache misses classification in a mul tithreading environment is given. This model is called the “D4C” model. The D4C model discriminates con flict misses in closed conflicts (a thread with himself) and crossed conflicts (conflicts between threads or inter ferences). SWSA-MT, 2 and 4 way set associative cache memories organizations are analyzed for multithreading processing. The results obtained from the execution of the SPLASH-2 benchmarks, show that the SWSA-MT and 4WSA organizations have similar performance. It is ob served that the SWSA-MT scheme shows a better crossed conflict miss rate relative to the other studied schemes. This is an important characteristic for the SWSA-MT organiza tion and it is due to the private memories that minimize the destructive interference between the threads.

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