N. Al-Awadhi, O. Sinanoglu, and M. Al-Mulla (Kuwait)
VLSI CAD, VLSI testing, Test compression, Design-fortestability.
The increasing size and complexity of integrated circuits result in unbearable test costs due to the consequent expansion of test data. While test stimulus compression helps reduce test time and data volume, and thus alleviates test costs, the delivery of certain test vectors may not be possible in the presence of a decompressor, leading to test quality degradation. Whether a test vector is encodable in the presence of a decompressor strongly hinges on the distribution of its care bits. Utilization of techniques, such as Align-Encode, that manipulate the distribution of care bits, thus improves test pattern encodability. The reconfigurability of Align- Encode provides a test pattern independent solution, wherein any given test vector can be analyzed to manipulate its care bit distribution. Manipulation of care bit distribution is attained by delaying the scan-in operation in judiciously selected scan chains. While Align-Encode has been proven to be beneficial when utilized in conjunction with fan-out decompressors, in this paper, we present the encodability enhancement delivered by Align-Encode when utilized in conjunction with XOR-based decompressors. We tackle the challenging delay information computation problem by implementing effective algorithms, enabling significant test quality improvements and/or test cost reductions.
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