Analog Multiplier for Feed Forward Neural Network Signal Processing

H. Chiblé and H. Jouni (Lebanon)


Analog Multipliers, Signal Processing, Simulation, Neural Networks.


In this paper, a new implementation of Four-Quadrant CMOS Analog Multiplier Circuit for feed forward neural networks multi layer perceptron operation will be proposed. The proposed multiplier will be divided into two or three parts, which will be inside the input, the synapse and the neuron. The main characteristics of the proposed circuit are the small silicon area and the low power consumption. A comparison among some multipliers VLSI circuits for the implementation of artificial neural networks has been presented.

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