Folded Torus based Power Aware Interconnection Topology for High-Performance Multicore Architecture

Abu Asaduzzaman, Sri R. Chaturvedula, and Ravi Pendse


Communication latency, Intermittent Communication, Routing, Wireless Multihop Transmissions, Secretaries Problem


Popular 2-D mesh networking topology is used in high-performance multicore/manycore systems mainly for its simplicity. In some 2-D mesh architecture, like MIT Raw Architecture Workstation (RAW), each node/tile has communication and computation components. Switching components of such a node consume power while the node is only computing (and vice versa). The large number of switches used in mesh topology is primarily responsible for high power consumption and high communication latency. In this paper, we propose an energy efficient interconnection network topology for multicore architecture. According to the proposed topology, nodes are separated between network switches and computing cores. Using folded torus concept, this proposal determines and connects the switches and cores. Although the number of switches is cut down significantly, each switch provides adequate communication channels. Using synthetic workload, we simulate RAW, Triplet Based Architecture (TriBA), Logic-Based Distributed Routing (LBDR), and the proposed topologies with up to 64 nodes. Experimental results show that the proposed topology outperforms RAW, TriBA, and LBDR. Comparing with RAW, proposed topology reduces the number of switches by up to 60%, the average hop count by up to 38%, and the power consumption per task by up to 80%.

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