Deriving a Multi-Level Program Model for Efficient Parallelization on Heterogeneous Platforms

Ana Balevic and Bart Kienhuis

Keywords

multilevel, parallel, polyhedral, heterogeneous platforms

Abstract

Tremendous progress in automatic parallelization brought advanced transformations for data parallelism and locality targeting chip multicore processors, but a platform as a whole is seldom considered. Emerging heterogeneous platforms composed of loosely coupled components such as CPUs, GPUs and specialized IP cores, offer unprecedented parallelization opportunities. We propose a hierarchical, multi-level program model, called HiPRDG, for more efficient mapping on heterogeneous platforms, and describe a method for its derivation from the standard program model in the polyhedral framework. In this paper, we show how a HiPRDG can be used to derive a two-level process network model of a streaming application, which is capable of exploiting task, data, and pipeline parallelism on a heterogeneous platform with a GPU accelerator, and present performance results.

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