Payal Patel and Mahmadasraf A. Mulla
Carrier, FPGA (field programmable logic array), matrix converter, modulation scheme, pulse width modulation, THD (total harmonic distortion), voltage transfer ratio
This work presents the single carrier-based pulse width modulation (CPWM) scheme which uses the ramp carrier instead of convention- ally used triangular carrier in the existing single CPWM schemes. The use of ramp carrier reduces the switching losses of the indirect matrix converter by reducing the switching frequency of the load side converter (LSC) stage switches. It is shown that the existing single CPWM scheme utilizing the triangular carrier leads to the double switching frequency operation of the LSC stage switches in comparison with that obtained by the ramp carrier. The simulation and experimental results are presented to prove the effectiveness of the presented CPWM scheme of providing the required input and output performances. The simulation is performed in PSIM soft- ware, and the control devices TMS320F28335 DSP and Spartan-6 FPGA are used to develop the control algorithm in the hardware prototype. The switching losses of the presented CPWM scheme are compared with those in the CPWM scheme utilizing the single triangular carrier. The thermal module of PSIM software is utilized to find the switching losses in both methods.
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